TE Connectivity launches Ultra Low-Profile PCIe Gen 7 connectors and cable assemblies

TE Connectivity, a world leader in connectivity and sensors, has launched its Ultra Low-Profile (ULP) PCIe Gen 7 connectors and cable assemblies to enable the data speeds and electrical performance that next-generation data centers and AI applications demand.

Delivering cutting-edge PCIe Gen 7 electrical performance in an ultra low-profile mating height of 8.7mm, TE’s innovative design not only offers data rates of 128 gigatransfers per second, but also can fit into tight spaces, such as beside a CEM connector slot, under heatsinks or near chips. Centrally located sidebands help ensure notable signal integrity and improved host board routability, enhancing the manufacturability and overall system performance of customer systems.

“The market outlook for PCIe Gen 7 technology has been spurred by the swift growth of artificial intelligence, machine learning and data centers combined with the escalating intricacy of technical standards,” comments TE Product Manager Laura Wang. “AI models are becoming twice as complex every four to six months, outstripping Moore’s Law and straining existing infrastructures. Hyperscale data centers today are hard-pressed to deliver the speed and low latency needed for processing trillion-parameter models.”

Earlier this year, TE demonstrated the ULP PCIe Gen 7 connector at DesignCon 2025 in Santa Clara, California, where the company showed how the connector performs at speed.

Key benefits of TE’s Ultra Low-Profile PCIe Gen 7 connectors and cable assemblies

1. Faster data rates with a smaller form factor: Can help achieve faster data rates and notable SI performance without compromising form factor, making it suitable for next-generation applications that require both speed and compactness.

2. Enhanced usability in dense applications: Low-profile mating height allows the solution to be used in locations that were previously impossible due to height constraints, expanding the range of potential applications.

3. Host board routability: Centrally located sidebands improve the manufacturability of the host board and enhance the signal integrity performance of the end-to-end channel, helping to provide reliable and high-quality data transmission.

4. Full portfolio solution: Customers can leverage this product family for a variety of applications, from X4/X8/X16 PCIe applications to different configurations, providing a comprehensive solution for their needs.